Processor pipelining is a known technique used to make processors operate more quickly. This technique enables a processor to work on different steps of an instruction at the same time and thereby take advantage of parallelism that exists among the steps needed to execute an instruction. As a result, a processor can execute more instructions in a shorter period of time. Many processors, especially those used in the embedded market, are relatively simple in-order machines. As a result, they are subject, for example, to data hazard stalls. More complex processors have out-of-order pipelines, which allow execution of instructions to be scheduled around hazards that would stall an in-order processor pipeline.
What is needed are new techniques and structures for processors that enhance processor performance.